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Education
B.S., Electrical Engineering
National Taiwan University (1981)
M.S., Electrical Engineering
National Taiwan University (1983)
Ph.D., Electrical Engineering
University of Southern California (1988)
Dr. Jean's research interests are RFID in health care applications and FPGA reconfigurable computing. He has developed research tools to manage the scheduling, allocation, loading, and deallocation of multiple FPGA chips, and to map certain image processing algorithms to FPGA chips. He is currently an Associate Editor of the Journal of VLSI Signal Processing and served with Dr. Sanjaya Kumar (Honeywell Technology Center) as a co-editor of a special issue on Reconfigurable Computing for the journal VLSI DESIGN, vol. 10, no. 3, 1999.
Selected Publications
X. Liang and J. S. N. Jean, Mapping of generalized template matching onto reconfigurable computers, IEEE Transactions on VLSI Systems, vol. 11, no. 3, 485-498, June 2003.
X. Guo and J. S. N. Jean, Design enumeration of mapping 2D FFT onto FPGA based reconfigurable computers, Proc. of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 305-306, June 2004.
F. Wang and J. Jean, Architectural support for runtime 2D partial reconfiguration, Proc. of the International Conference on Engineering of Reconfigurable Systems and Algorithms, 231-234, June 2006.
Active Research Projects
Electronic care patient tracking (with Professors Yong Pei, TK Prasad, and Bin Wang), funded by AFRL
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Research Interests
High-performance computer architectures, machine intelligence
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